"Intel's Broadwell-U arrives aboard 15W, 28W mobile processors".
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Intel® Turbo Boost Technology Frequency Tables for Intel Core i5 Desktop Processors ^ a b c d e "Some details of "Haswell Refresh" desktop CPUs".^ a b c "Specifications of Haswell Refresh CPUs".^ Counting Transistors: Why 1.16B and 995M Are Both Correct, by Anand Lal Shimpi on September 14, 2011,.Core i5-520E has support for ECC memory and PCI express port bifurcation.Graphics and Integrated Memory Controller die size: 114 mm².All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Hyper-threading, Turbo Boost, Smart Cache.Mobile processors Westmere microarchitecture (1st generation) " Arrandale" ( MCP, 32 nm) Overclocking: Unlocked multiplier on K and KF models.All models support up to DDR5-4800 or DDR4-3200 memory, and 16 lanes of PCI Express 5.0 + 4 lanes of PCIe 4.0.All models support: SSE4.1, SSE4.2, AVX, AVX2, FMA3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Hyper-threading, Turbo Boost, AES-NI, Smart Cache, Thread Director, DL Boost, GNA 3.0, and Optanememory.Golden Cove + Gracemont microarchitecture (12th generation) " Alder Lake" (Intel 7) Non-K processors have limited turbo overclocking (extra 4 turbo bins).P processors disable the integrated graphics processor.K processors have unlocked turbo multiplier.T processors feature an even lower TDP (45 W on 4-core models).S processors feature lower-than-normal TDP (65 W on 4-core models).All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Turbo Boost, AES-NI, Smart Cache, Intel Insider.All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Turbo Boost, Smart Cache.2.11.4 "Tiger Lake-UP4" (10 nm SuperFin)ĭesktop processors Nehalem microarchitecture (1st generation) "Lynnfield" (45 nm).2.11 Willow Cove microarchitecture (11th generation).2.10 Sunny Cove microarchitecture (10th generation).2.9 Comet Lake microarchitecture (10th generation).2.8 Coffee Lake microarchitecture (8th/9th generation).2.7.4 "Kaby Lake Refresh" (quad-core, 14 nm).2.7 Kaby Lake microarchitecture (7th/8th generation).2.6 Skylake microarchitecture (6th generation).2.5 Broadwell microarchitecture (5th generation).2.4 Haswell microarchitecture (4th generation).2.3 Ivy Bridge microarchitecture (3rd generation).2.2 Sandy Bridge microarchitecture (2nd generation).2.1 Westmere microarchitecture (1st generation).1.12 Golden Cove + Gracemont microarchitecture (12th generation).1.11 Cypress Cove microarchitecture (11th generation).1.10 Comet Lake microarchitecture (10th generation).1.9 Coffee Lake microarchitecture (8th/9th generation).1.8 Kaby Lake microarchitecture (7th generation).1.7 Skylake microarchitecture (6th generation).1.6 Broadwell microarchitecture (5th generation).
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1.5.2 "Haswell-DT" (quad-core, 22 nm, 4th generation).1.5 Haswell microarchitecture (4th generation).1.4 Ivy Bridge microarchitecture (3rd generation).1.3 Sandy Bridge microarchitecture (2nd generation).1.2 Westmere microarchitecture (1st generation).1.1 Nehalem microarchitecture (1st generation).